xe2x80x9cThis application is a national phase of PCT/FR99/02228 which was filed on Sep. 20, 1999, and was not published in English.xe2x80x9d
The present invention relates to a method for treating a silicon substrate for the purpose of forming, on at least one of its surfaces, a layer of electric insulating material such as, for example, a layer of silicon nitride.
The invention finds applications in the production of electronic devices with components having a thin electric insulating layer, and in particular for the production of DRAM type memories (dynamic random access memory) or EPROM memories (erasable/programmable read only memory).
It may also be applied to the production of electronic circuits having insulated gate transistors such as MOS transistors or other components such as capacitors.
The increased performance of electronic components in terms of frequency, integration and electric capacity for memories, is accompanied by a reduction in the thickness of the electric insulating layers, in particular of the gate layers of these devices.
The gate layer, for components made on a silicon substrate is usually a layer of silicon oxide.
The reduction in the thickness of the oxide layer to values of less than 3 nm gives rise to problems relating to the diffusion of doping impurities derived from overlying active layers, through the oxide layer. This diffusion has adverse effects on the reliability and performances of the components comprising the oxide layer.
The problem of the diffusion of doping impurities may be remedied, at least in part, by incorporating in the gate layer oxide of the components an appropriate dose of nitrogen, in particular by means of a nitriding treatment. In particular, the oxide layer may be combined with or optionally replaced by a layer of silicon nitride.
Also, to illustrate the fabrication of thin nitride layers in DRAM and EPROM structures, reference may be made to documents [1], [2], [3], [4] and [5] whose references are specified at the end of this disclosure.
Document [1] in particular shows that it is not possible to form a homogeneous, continuous nitride layer thinner than 5 nm on a layer of native oxide on the surface of a substrate.
For applications such as the fabrication of memories, however, gate thicknesses of less than 5 nm are required.
Document [2] suggests solving the problems of continuity or non-homogeneity of the thin nitride layers ( less than 3 nm) by subjecting them to quick annealing in an atmosphere of NH3 at temperatures in the order of 950xc2x0 C. Nevertheless, it arises that such annealing, owing to its high temperature, may deteriorate the electronic components previously formed in the substrate.
Documents [3] and [4] describe techniques with which a layer of native oxide, initially present on the surface of a silicon substrate, is removed before the formation of a nitride layer by chemical vapour deposition on the exposed silicon surface. Deoxidation of the substrate may take place by annealing under hydrogen or by chemical means using hydrofluoric acid.
Finally, document [5] proposes forming on the substrate a layer of silicon oxynitride, prior to the layer of silicon nitride. The oxynitride layer is formed in an atmosphere of NO. The silicon nitride layer is then is formed from the gases SiH4 and NH3 in a reactor of monoplate type. Enriching the treatment gases with silane (SiH4) promotes nucleation of the silicon nitride but deteriorates its stoicheiometric quality. The use of a monoplate reactor is also scarcely compatible with industrial production of components with low production costs.
The methods of documents [3], [4] and [5] also entail treatments at high temperatures, in the order of 800xc2x0C. to 1000xc2x0 C., and use high heat schedules.
For a certain number of components, however, in particular structures of embedded DRAM type, it is sought on the contrary to reduce the heat schedules as much as possible, that is to say the time and length of heat treatments. High heat schedules and high treatment temperatures are harmful for the components.
The object of the invention is to put forward a method for preparing a substrate with which it is possible to form a thin layer of electric insulator which does not have the above-mentioned difficulties.
One object in particular is to put forward such a method enabling the formation of a continuous, homogeneous, thin nitride layer on a silicon substrate.
A further object of the invention is to put forward a method which uses lower heat schedules and temperatures.
To reach these objects, the subject of the invention is more precisely a method for treating a silicon substrate so as to form a thin, electric, insulating layer. In accordance with the invention, the method comprises, in order:
a deoxidation step of at least part of the silicon substrate, then
a heat treatment step of the substrate at a temperature of 750xc2x0 C. or less, the heat treatment being made in a NO-containing atmosphere, at a pressure of 5.103 Pa (50 mBar) or less, and preferably less than 103 Pa (10 mBar) in order to form on the substrate a layer of silicon oxynitride, and
a formation step to form, at least on said part of the substrate, a layer of electric insulating material.
By a NO-containing atmosphere is meant an atmosphere of pure NO or NO diluted with an inert gas such as nitrogen or argon.
With the heat treatment it is possible, on the surface of the deoxidised part of the substrate, to form a very fine layer of silicon oxynitride whose thickness may be less than one nanometre. This layer enables the subsequent formation of a thin insulating layer that is homogeneous and continuous.
Moreover, the oxynitride layer prevents the formation on the substrate of parasite deposits of metallic oxides such as Ta2O5 whose onset may occur during oxidizing treatments.
The heat treatment of the method is applied at temperatures of less than 750xc2x0 C., for example at a temperature in the order of 550xc2x0 C. The method may therefore be applied to substrates comprising electronic components that are relatively sensitive to heat, previously formed.
Preferably, the heat treatment may be applied for a sufficient length of time to obtain an oxynitride layer having a thickness of between 0.5 and 1.5 nm.
As an example, the heat treatment may be conducted at a temperature in the region of 550xc2x0 C., a pressure in the order of 103 Pa (10 mBar) for a time of approximately 30 seconds to obtain an oxynitride layer of 0.7 nm.
The silicon substrate used may have been previously subjected to prior treatment in order to form electronic components therein or parts of electronic components.
The layer of electric insulating material formed on the substrate may be a layer of silicon nitride (Si3N4) or a layer of Ta2O5 chosen for their strong dielectric constant.
In respect of a layer of silicon nitride Si3N4, this may be preferably formed by a method of LPCVD type (Low Pressure Chemical Vapour Deposition) in the presence of an atmosphere containing dichlorisilane (SiH2Cl2) and/or ammonia NH3. The deposit is made at a temperature of 750xc2x0 C. or less, for example 700xc2x0 C.
The invention also concerns a substrate, which may be obtained according to the above-described method and which, in order, comprises a layer of silicon with at least one area devoid of native oxygen, a layer of silicon oxynitride having a thickness of between 0.5 and 1.5 nm in contact with said area, and a layer in an electric insulating material having a thickness of between 2 and 5 nm in contact with said layer of silicon oxynitride. The electric insulating material may be chosen from among Si3N4 and Ta2O5 for example.
Other characteristics and advantages of the invention will become better apparent from the following description with reference to the figures of the appended drawings. This description is given solely for illustration purposes and is not restrictive.